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Wenninger

2-01

Jakob Wenninger
, Faouzi Boussaha, Boon-Kok Tan
University of Oxford, GEPI, Observatoire de Paris

Development of a Compact 240 GHz Dual-Polarisation SIS Receiver

The low pixel count of SIS receivers limits their observational speed and therefore, the ability to map large-scale structures. One major drawback of current SIS receiver technology is the space-consuming method of separating the polarisation information using a wire grid or a waveguide orthomode transducer (OMT) and feeding the two polarisation signals into two separate SIS mixer receiver chains. Therefore, we aim to develop an on-chip dual-polarisation SIS array receiver solution covering the 190-290 GHz band, to demonstrate the feasibility of the required technologies before extending it to a higher frequency range. We approach this by 1) combining the two mixers required for the dual-polarisation detection in a single-chip design, and 2) developing a single-chip multi-pixel dual-polarisation receiver with an on-chip local oscillator (LO) injection scheme.

Our compact dual-polarisation SIS mixer chip combines all the required components, i.e., the planar OMT, tunnel junctions and ancillary superconducting circuits, onto a 4.2 mm by 4.3 mm chip. The chip is mounted in a 40 mm by 40 mm mixer block, with plenty of margins to accommodate differently sized IF circuitries and magnetic bias options. This single-pixel dual-polarisation mixer design is ready to be extended to form a multi-pixel array, as all the required RF and IF accesses are located only on the front and back sides of the block. Therefore, they can be easily stacked horizontally and vertically to form a larger array. One downside of this scheme is that the LO injection still requires free-space optical components such as meandered beam splitters. In the second phase of the project, we simplify this LO injection scheme by including a separate OMT on-chip for LO coupling while keeping the RF circuit almost unchanged. We will demonstrate this fully on-chip receiver technology by designing a two-pixel dual-polarisation SIS array receiver.